1. Field of the Invention
The invention relates to an interconnect structure utilizing copper conductive layer separated by a cured epoxy resin dielectric material, and more particularly to a high density circuit suitable for use as an interconnect device for integrated circuits.
2. Description of the Related Technology
Integrated circuit technology has advanced to where chip-to-chip interconnect delay and line density are limiting factors in the overall performance and size of an integrated module. A high density, high performance alternative to conventional printed circuit (PC) board interconnects is required to address certain deficiencies in printed circuit board chip-to-chip interconnect structures.
Conventional PC board interconnects have been constructed of laminated materials made from glass impregnated with epoxy resin, an example of which is designated "FR-4," a classification representing a flame retardant bisphenol-A-based epoxy resin with a glass transition temperature of 120-150.degree. C. after curing. The line density of a single layer PC board is limited by surface characteristics, such as pits and dents in the laminated foil, print-through of the fabric weave pattern in the foil, and bow and twist features of the overall laminate, to about 200 lines per inch per level. Plated through-holes consume large amounts of board area, severely reducing the board area available for interconnect lines. Copper/organic polymer type structures made with 1970's integrated circuit fabrication equipment and techniques can be fabricated with densities of over 500 lines per inch per level, reducing line lengths and signal propogation delay, and allowing higher packaging density.
Microelectronics and Computer Technology Corporation (MCC), an assignee of the present invention, has developed high density, high performance interconnect systems in which integrated circuit interconnect circuits fabricated from a copper/polyimide structure are utilized to significantly reduce delays and cross-talk or noise. Such systems are described in U.S. Ser. Nos. 07/102,172 and 07/158,172, the disclosures of which are incorporated by reference. Copper/polyimide interconnects may be fabricated with either stacked of staggered vias and may be in a set or predetermined circuit pattern or customizable. The copper/polyimide interconnects represent a significant advance over the prior technology. However, they suffer certain fabrication limitations based on the material characteristics of the polyimide. Polyimide is hygroscopic and therefore requires in-process dehydration bake steps during fabrication. Furthermore, copper conductors require an overcoat in order to prevent undesirable copper/polyimide interactions, for instance oxidation and/or corrosion of the copper, and loss of adhesion strength of the polyimide to the copper.